Electronic computer aided design (ECAD) software tools for static timing analysis (STA) may be used to estimate timing delays in an electronic circuit design, such as electronic circuit designs that may be found in integrated circuit designs. With improved process technology, smaller transistor channel lengths have become available to increase the number of electronic circuits and functionality that can be designed into an integrated circuit.
However with a greater number of circuits and functionality, greater demands are placed on the ECAD software tools to simulate the designs in a timely manner. Methods to more quickly simulate an integrated circuit design can increase design efficiency and possibly reduce the time to market of an integrated circuit.